In-memory processing

Results: 424



#Item
171Information technology management / Database / Scalability / Big data / In-Memory Processing / SQL / In-memory database / Database tuning / Database management systems / Data management / Computing

E - PAPER Why DBMSs Matter More than Ever in the Big Data Era

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Source URL: www.dotgroup.co.uk

Language: English - Date: 2014-11-25 16:29:52
172Data management / Relational database management systems / Cross-platform software / Information technology management / IBM DB2 / Oracle Corporation / In-memory database / In-Memory Processing / SAP AG / Database management systems / Software / Computing

White Paper Considerations for maximising analytic performance A White Paper by Bloor Research Author : Philip Howard

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Source URL: www.dotgroup.co.uk

Language: English - Date: 2014-11-25 16:29:47
173Central processing unit / Computer memory / Parallel computing / Microarchitecture / Process / Circular buffer / Reduced instruction set computing / Cache / Computing / Computer hardware / Computer architecture

Tradeoffs in Buffering Speculative Memory State for Thread-Level Speculation in Multiprocessors ´ GARZARAN ´ MAR´ıA JESUS

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Source URL: iacoma.cs.uiuc.edu

Language: English - Date: 2006-02-05 01:16:31
174Psycholinguistics / Memory / Creativity / Dyslexia / Working memory / Sentence processing / Levels-of-processing effect / Trace / Wh-movement / Mind / Cognitive science / Linguistics

Clause-Edge Reactivations of Fillers in Processing English as a Second Language

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Source URL: www.lingref.com

Language: English - Date: 2013-07-01 12:57:46
175Concurrency control / Transaction processing / Symposium on Parallelism in Algorithms and Architectures / Education in Munich / Transactional memory / SPAA Conference / Kunle Olukotun / Garching bei München / Technical University Munich / Concurrent computing / Computing / Nir Shavit

Microsoft Word - SPAA-Program3.doc

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Source URL: www.cs.jhu.edu

Language: English - Date: 2008-06-06 04:01:18
176Computing / Microprocessors / Threads / Parallel computing / CPU cache / Computer memory / Multithreading / Microarchitecture / Threading / Computer hardware / Computer architecture / Central processing unit

Bulk Disambiguation of Speculative Threads in Multiprocessors∗ Luis Ceze, James Tuck, C˘alin Cas¸caval† and Josep Torrellas University of Illinois at Urbana-Champaign {luisceze, jtuck, torrellas}@cs.uiuc.edu http:/

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Source URL: iacoma.cs.uiuc.edu

Language: English - Date: 2006-04-04 17:00:54
177Computer architecture / CPU cache / Memory disambiguation / Squash / Branch predictor / Parallel computing / Central processing unit / Monitor / Speculative execution / Computer memory / Computing / Computer hardware

Eliminating Squashes Through Learning Cross-Thread Violations in Speculative Parallelization for Multiprocessors Marcelo Cintra Josep Torrellas 

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Source URL: iacoma.cs.uiuc.edu

Language: English - Date: 2001-12-10 19:25:05
178Information theory / CPU cache / Cache / Central processing unit / Computer memory / Amazon Elastic Compute Cloud / Hyper-V / Covert channel / Channel / Computing / Computer architecture / System software

An Exploration of L2 Cache Covert Channels in Virtualized Environments Kaustubh Joshi, Matti Hiltunen, Richard Schlichting Yunjing Xu, Michael Bailey,

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Source URL: mdbailey.ece.illinois.edu

Language: English - Date: 2014-08-05 13:28:17
179Central processing unit / Microprocessors / CPU cache / Cache / Computer memory / Parallel computing / Microarchitecture / Memory disambiguation / Data structure alignment / Computer hardware / Computer architecture / Computing

Architectural Support for Scalable Speculative Parallelization in Shared-Memory Multiprocessors Marcelo Cintra, Jose´ F. Mart´ınez, and Josep Torrellas Department of Computer Science University of Illinois at Urbana-C

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Source URL: iacoma.cs.uiuc.edu

Language: English - Date: 2010-12-27 12:21:04
180Central processing unit / Cache / CPU cache / Computer memory / Microarchitecture / AMD 10h / Parallel computing / LEON / Speculative execution / Computer hardware / Computer architecture / Computer engineering

The Design Complexity of Program Undo Support in a General-Purpose Processor Radu Teodorescu and Josep Torrellas Department of Computer Science University of Illinois at Urbana-Champaign http://iacoma.cs.uiuc.edu

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Source URL: iacoma.cs.uiuc.edu

Language: English - Date: 2005-10-16 18:49:08
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